A 176 x 144 processor binary I/O CNN-UM chip design

A. Paasio, A. Kananen, V. Porra

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

    Original languageEnglish
    Title of host publicationEuropean Conference on Circuit Theory and Design ECCTD'99, Stresa, Italy, 1999
    Pages82-86
    Publication statusPublished - 1999
    MoE publication typeA4 Article in a conference publication

    Keywords

    • cellular nonlinear network
    • hardaware realization
    • QCIF size

    Cite this