A 1.5-1.9-GHz all-digital tri-phasing transmitter with an integrated multilevel class-D power amplifier achieving 100-MHz RF bandwidth

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A 1.5-1.9-GHz all-digital tri-phasing transmitter with an integrated multilevel class-D power amplifier achieving 100-MHz RF bandwidth. / Lemberg, Jerry; Martelius, Mikko; Roverato, Enrico; Antonov, Yury; Nieminen, Tero; Stadius, Kari; Anttila, Lauri; Valkama, Mikko; Kosunen, Marko; Ryynänen, Jussi.

In: IEEE Journal of Solid-State Circuits, Vol. 54, No. 6, 8672775, 01.06.2019, p. 1517-1527.

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@article{ab109514542842648d5a6f942c2a3e45,
title = "A 1.5-1.9-GHz all-digital tri-phasing transmitter with an integrated multilevel class-D power amplifier achieving 100-MHz RF bandwidth",
abstract = "We present a prototype RF transmitter with an integrated multilevel class-D power amplifier (PA), implemented in 28-nm CMOS. The transmitter utilizes tri-phasing modulation, which combines three constant-envelope phase-modulated signals with coarse amplitude modulation in the PA. This new architecture achieves the back-off efficiency of multilevel outphasing, without linearity-degrading discontinuities in the RF output waveform. Because all signal processing is performed in the time domain up to the PA, the entire system is implemented with digital circuits and structures, thus also enabling the use of synthesis and place-and-route CAD tools for the RF front end. The effectiveness of the digital tri-phasing concept is supported by extensive measurement results. Improved wideband performance is validated through the transmission of orthogonal frequency-division multiplexing (OFDM) bandwidths up to 100 MHz. Enhanced reconfigurability is demonstrated with non-contiguous carrier aggregation and digital carrier generation between 1.5 and 1.9 GHz without a frequency synthesizer. For a 20-MHz 256-QAM OFDM signal at 3.5{\%} error vector magnitude (EVM), the transmitter achieves 22.6-dBm output power and 14.6{\%} PA efficiency. Thanks to the high linearity enabled by tri-phasing, no digital predistortion is needed for the PA.",
keywords = "All-digital transmitter, class-D power amplifier (PA), digital interpolating phase modulator (DIPM), multilevel outphasing, tri-phasing",
author = "Jerry Lemberg and Mikko Martelius and Enrico Roverato and Yury Antonov and Tero Nieminen and Kari Stadius and Lauri Anttila and Mikko Valkama and Marko Kosunen and Jussi Ryyn{\"a}nen",
note = "| openaire: EC/H2020/704947/EU//ADVANTAG5",
year = "2019",
month = "6",
day = "1",
doi = "10.1109/JSSC.2019.2902753",
language = "English",
volume = "54",
pages = "1517--1527",
journal = "IEEE Journal of Solid-State Circuits",
issn = "0018-9200",
publisher = "Institute of Electrical and Electronics Engineers",
number = "6",

}

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TY - JOUR

T1 - A 1.5-1.9-GHz all-digital tri-phasing transmitter with an integrated multilevel class-D power amplifier achieving 100-MHz RF bandwidth

AU - Lemberg, Jerry

AU - Martelius, Mikko

AU - Roverato, Enrico

AU - Antonov, Yury

AU - Nieminen, Tero

AU - Stadius, Kari

AU - Anttila, Lauri

AU - Valkama, Mikko

AU - Kosunen, Marko

AU - Ryynänen, Jussi

N1 - | openaire: EC/H2020/704947/EU//ADVANTAG5

PY - 2019/6/1

Y1 - 2019/6/1

N2 - We present a prototype RF transmitter with an integrated multilevel class-D power amplifier (PA), implemented in 28-nm CMOS. The transmitter utilizes tri-phasing modulation, which combines three constant-envelope phase-modulated signals with coarse amplitude modulation in the PA. This new architecture achieves the back-off efficiency of multilevel outphasing, without linearity-degrading discontinuities in the RF output waveform. Because all signal processing is performed in the time domain up to the PA, the entire system is implemented with digital circuits and structures, thus also enabling the use of synthesis and place-and-route CAD tools for the RF front end. The effectiveness of the digital tri-phasing concept is supported by extensive measurement results. Improved wideband performance is validated through the transmission of orthogonal frequency-division multiplexing (OFDM) bandwidths up to 100 MHz. Enhanced reconfigurability is demonstrated with non-contiguous carrier aggregation and digital carrier generation between 1.5 and 1.9 GHz without a frequency synthesizer. For a 20-MHz 256-QAM OFDM signal at 3.5% error vector magnitude (EVM), the transmitter achieves 22.6-dBm output power and 14.6% PA efficiency. Thanks to the high linearity enabled by tri-phasing, no digital predistortion is needed for the PA.

AB - We present a prototype RF transmitter with an integrated multilevel class-D power amplifier (PA), implemented in 28-nm CMOS. The transmitter utilizes tri-phasing modulation, which combines three constant-envelope phase-modulated signals with coarse amplitude modulation in the PA. This new architecture achieves the back-off efficiency of multilevel outphasing, without linearity-degrading discontinuities in the RF output waveform. Because all signal processing is performed in the time domain up to the PA, the entire system is implemented with digital circuits and structures, thus also enabling the use of synthesis and place-and-route CAD tools for the RF front end. The effectiveness of the digital tri-phasing concept is supported by extensive measurement results. Improved wideband performance is validated through the transmission of orthogonal frequency-division multiplexing (OFDM) bandwidths up to 100 MHz. Enhanced reconfigurability is demonstrated with non-contiguous carrier aggregation and digital carrier generation between 1.5 and 1.9 GHz without a frequency synthesizer. For a 20-MHz 256-QAM OFDM signal at 3.5% error vector magnitude (EVM), the transmitter achieves 22.6-dBm output power and 14.6% PA efficiency. Thanks to the high linearity enabled by tri-phasing, no digital predistortion is needed for the PA.

KW - All-digital transmitter

KW - class-D power amplifier (PA)

KW - digital interpolating phase modulator (DIPM)

KW - multilevel outphasing

KW - tri-phasing

UR - http://www.scopus.com/inward/record.url?scp=85066461891&partnerID=8YFLogxK

U2 - 10.1109/JSSC.2019.2902753

DO - 10.1109/JSSC.2019.2902753

M3 - Article

VL - 54

SP - 1517

EP - 1527

JO - IEEE Journal of Solid-State Circuits

JF - IEEE Journal of Solid-State Circuits

SN - 0018-9200

IS - 6

M1 - 8672775

ER -

ID: 34498699