A 1.2 6.4 GHz clock generator with a low-power DCO and programmable multiplier in 40-nm CMOS

Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review


Research units


Original languageEnglish
Title of host publicationIEEE International Symposium on Circuits and Systems (ISCAS), Melbourne, Australia, June 1-5, 2014
Publication statusPublished - 2014
MoE publication typeA4 Article in a conference publication

Publication series

ISSN (Electronic)0271-4302

ID: 531108