A 1.2 6.4 GHz clock generator with a low-power DCO and programmable multiplier in 40-nm CMOS

Tero Tikka, Kari Stadius, Jussi Ryynänen, Martti Voutilainen

Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

7 Citations (Scopus)
Original languageEnglish
Title of host publicationIEEE International Symposium on Circuits and Systems (ISCAS), Melbourne, Australia, June 1-5, 2014
Pages506-509
Publication statusPublished - 2014
MoE publication typeA4 Article in a conference publication

Publication series

Name
ISSN (Electronic)0271-4302

Cite this