A 0.8-3 GHz mixer-first receiver with on-chip transformer balun in 65-nm CMOS

Tero Tikka, Kari Stadius, Jussi Ryynänen, Mikko Kaltiokallio

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

    6 Citations (Scopus)

    Abstract

    This paper describes a wide-band receiver designed to be connected directly to a single-ended non-50 ohm antenna. The receiver is based on a four-phase mixer-first architecture and it includes an on-chip transformer balun. Reconfigurability in the balun extends the low-end operation band by 300 MHz. This design demonstrates that with an on-chip balun it is possible to achieve comparable performance to a similar receiver with an external high-performance balun. The receiver is implemented in 65-nm CMOS and it operates in 0.8-3 GHz band with 40 dB gain and 7 dB noise figure.

    Original languageEnglish
    Title of host publicationEuropean Solid-State Circuits Conference
    PublisherIEEE Computer Society
    Pages295-298
    Number of pages4
    Volume2015-October
    ISBN (Print)9781467374705
    DOIs
    Publication statusPublished - 30 Oct 2015
    MoE publication typeA4 Article in a conference publication
    EventEuropean Solid-State Circuits Conference - Graz, Austria
    Duration: 14 Sep 201518 Sep 2015
    Conference number: 41

    Conference

    ConferenceEuropean Solid-State Circuits Conference
    Abbreviated titleESSCIRC
    CountryAustria
    CityGraz
    Period14/09/201518/09/2015

    Keywords

    • CMOS
    • mixer-first
    • transformer

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